When citing the Mont-Blanc project, we would be grateful if you could cite our paper "SUPERCOMPUTING WITH COMMODITY CPUS: ARE MOBILE SOCS READY FOR HPC?", winner of the Best Student Paper Award during the 2013 edition of the Supercomputing Conference.

Found 113 results
H. Zhou and Gracia, J., Application Productivity and Performance Evaluation of Transparent Locality-aware One-sided Communication Primitives, International Journal of Networking and Computing, vol. 7, 2017.
P. Schiffmann, An ARM Porting Story - Optimizing a RBF Interpolation Solver for Energy on Heterogeneous Systems. GoingARM Workshop, ISC, Frankfurt, Germany, 2017.
F. Mantovani, Butterfly effect of porting scientific applications to ARM-based platforms. GoingARM Workshop, ISC, Frankfurt, Germany, 2017.
A. Ferreóon, Jagtap, R., Bischoff, S., and Rusitoru, R., Crossing the Architectural Barrier: Evaluating Representative Regions of Parallel HPC Applications, International Symposium on Performance Analysis of Systems and Software (ISPASS), Santa Rosa, CA, USA, 2017.
A. Mohammad, Darbaz, U., Dozsa, G., Diestelhorst, S., Kim, D., and Kim, N. Sung, dist-gem5: Distributed Simulation of Computer Cluster, International Symposium on Performance Analysis of Systems and Software (ISPASS), Santa Rosa, CA, USA, 2017, 2017.
J. Wanza Weloli, Bilavarn, S., De Vries, M., Derradji, S., and Belleudy, C., Efficiency Modeling and Exploration of 64-bit ARM Compute Nodes for Exascale. Microprocessors and Microsystems, 2017.
A. Butko, Bruguier, F., Gamatie, A., and Sassatelli, G., Efficient Programming for Multicore Processor Heterogeneity: OpenMP versus OmpSs. OpenSuCo workshop, ISC 2017, Frankfurt, Germany, 2017.
A. Nocua, Bruguier, F., Sassatelli, G., and Gamatie, A., ElasticSimMATE: A fast and accurate gem5 trace-driven simulator for multicore systems, Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017, Madrid, 2017.
D. Ruiz, Calore, E., and Mantovani, F., Enabling PAPI support for advanced performance analysis on ThunderX SoC, UPCommons, Barcelona, Spain, 2017.
A. Lumi and Haase, G., Energy aware computations on many core systems. PARNUM 2017 workshop, Waischenfeld, Germany, 2017.
M. Benito, Vallejo, E., Beivide, R., and Izu, C., Extending commodity OpenFlow switches for large-scale HPC deployments. 2017 IEEE 3rd International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era (HiPINEB), Austin, Texas, USA, 2017.
P. Fuentes, Vallejo, E., Beivide, R., Minkenberg, C., and Valero, M., FlexVC: Flexible Virtual Channel Management in Low-Diameter Networks, in Best Paper in architecture track, Parallel and Distributed Processing Symposium (IPDPS), Orlando, FL, USA, 2017.
R. Rusitoru and Beard, J., GoingARM workshop. ISC, Frankurt, Germany, 2017.
R. Nishtala, Carpenter, P., Petrucci, V., and Martorell, X., Hipster: Hybrid Task Manager for Latency-Critical Cloud Workloads. The 23rd IEEE Symposium on High Performance Computer Architecture, 2017.
M. Popov, Akel, C., Chatelain, Y., Jalby, W., and Castro, Pde Oliveir, Piecewise holistic autotuning of parallel programs with CERE, 2017.
F. Mantovani, Power monitoring on ARM-based HPC clusters: experiences from young and old. EECS Seminar 2017 Energy Efficient Computing Systems, NTNU Norway, 2017.
C. Camarero, Martínez, C., and Beivide, R., Random Folded Clos Topologies for Datacenter Networks. 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA), Austin, Texas, USA, 2017.
K. Chronaki, Rico, A., Casas, M., Planas, M. Moreto, Sala, R. Maria Badi, Parra, E. Ayguadé, Mancho, J. José Laba, and Cortés, M. Valero, Task scheduling techniques for asymmetric multi-core systems, 2017.
I. Pérez, Castillo, E., Beivide, R., Vallejo, E., Bosque, J. Luis, Moreto, M., Casas, M., and Valero, M., Analyzing the Impact of Parallel Programming Models in NoCs of Forthcoming CMP Architectures. Proceedings of the EMerging Technology (EMiT) Conference, Barcelona, Spain, 2016.
S. McIntosh-Smith, Hunt, R., Price, J., and Vesztrocy, A., Application-Based Fault Tolerance Techniques for Sparse Matrix Solvers. International Journal of High Performance Computing Applications, 2016.
L. Fialho, ARM on HPC: status of commonly used performance analysis tools, Cambridge, United Kingdom, 2016.
J. Gracia and Zhou, H., Asynchronous progress design for a MPI-based PGAS one-sided communication system. 22nd IEEE International Conference on Parallel and Distributed Systems (ICPADS 2016), Wuhan, China, 2016.
E. Castillo, Moreto, M., Casas, M., Alvarez, L., Vallejoz, E., Chronaki, K., Badia, R., Bosquez, J. Luis, Beividez, R., Ayguadé, E., Labarta, J., and Valero, M., CATA: Criticality Aware Task Acceleration for Multicore Processors. International Parallel and Distributed Parallel Symposium (IPDPS) 2016, Chicago, USA, 2016.
O. Subasi, Unsal, O., Labarta, J., Yalcin, G., and Cristal, A., Crc-based memory reliability for task-parallel hpc applications, IPDPS’2016, 2016.
J. Wanza Weloli, Bilavarn, S., Derradji, S., Belleudy, C., and Lesmanne, S., Efficiency Modeling and Analysis of 64-bit ARM Clusters for HPC. 2016 Euromicro Conference on Digital System Design (DSD) , 2016.